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標題Title: BOARD LEVEL PLACEMENT
作者Authors: 黎靖
上傳單位Department: 電子工程系
上傳時間Date: 2009-11-20
上傳者Author: 黎靖
審核單位Department: 電子工程系
審核老師Teacher: 黎靖
檔案類型Categories: 論文Thesis
關鍵詞Keyword: BOARD LEVEL PLACEMENT
摘要Abstract: This paper develops a placement scheme which couples both wireability and reliability requirements together for convectively cooled PWBs. Our approach differs from the previous one [Ost90] in two respects. First, we can obtain the Pareto optimum solutions. Second, in our approach, wireability is measured by the maximum wiring density instead of the total wiring lengths. Thus possibility of heavy wiring buildup or congestion regions, especially in the middle of a board, can be avoided.

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2009_11_4f59f21c.pdf 113Kb pdf 789 77
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